This invention relates to bubble memories, and more particularly to methods and apparatus for dealing with defective minor loops in the memories. Perhaps the most popular architecture for bubble memories is that in which bubbles are stored in a plurality of minor loops. A serial-parallel bubble propagation path is used to transfer bubbles into the loops, and a parallel-serial bubble propagation path is used to transfer from the loops.
However, due to a variety of causes, some of the loops develop defects during their fabrication. For example, the defects may be due to flaws in the garnet film, which resists bubble propagation. They may also be due to photolithography tolerances, or due to dust and other impurities which enter the memory during fabrication. As a result, some small percentage of the loops, such as less than 5 percent, typically do not work.
To overcome this problem, bubble memories are fabricated with extra minor loops. Then all bad loops, and any good loops in excess of a designed number, simply are not used. Suppose for example, that a bubble memory chip was designed to have 256 fault free minor loops. To achieve this the memory would be built with some larger number of minor loops, such as 270. Then in most cases, at least 256 loops would be fault free.
The problem then becomes one of devising a method or apparatus for bypassing the defective loops as information is written into and read from the memory. Suppose in the preceding example, loops 10 and 100 were defective. Under those conditions, no data could be written into the memory on the 10th and 100th clocking pulses out of every 270 clocking pulses. Similarly, during a read operation, the 10th and 100th bits of information out of every 270 bits of information that are read from the memory must be ignored.
Such control functions in the past have always required external control circuitry. One common prior art control circuitry includes a read only memory (ROM) that is programmed to indicate which of the loops are defective. Address counters simultaneously address both the ROM and the bubble memory. And when the ROM output indicates that the bubble memory location being addressed is defective, corrective action is taken.
One problem with the above prior art solution of handling defective loops, is that the added control circuitry increases the cost of the bubble memory system. Further, it increases the complexity of the design. Also, the bubble memory chips are not interchangable. Thus, whenever a bubble memoy chip goes bad (due to aging, overheating, etc.) both the bubble chip and the ROM chip must be replaced.
In addition, the operating speed of the memory is slower than it would be if the defects were transparent to the user. Consider again, the above described example that had 270 total loops of which only 256 loops were guaranteed to be non-defective. In that memory, a total of 270 revolutions of an external magnetic field are required to load one bubble into 256 minor loops. Conversely, if the defective loops were transparent to the user, a total of only 256 rotations of the magnetic field would be required to load one bubble into each of the loops.
Accordingly, it is one object of the invention to provide an improved bubble memory.
Another object of the invention is to provide a bubble memory having defective minor loops that require no external control circuitry for their compensation.
Another object of the invention is to provide bubble memory chips that are interchangeable.
Still another object of the invention is to provide bubble memory chips having improved data transfer time.